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活动简介

After the great success of the first EUROSOI-ULIS event in Bologna, it is our pleasure to announce that the second joint EUROSOI-ULIS event will be hosted by the Institute for Microelectronics, TU Wien. The focus of the sessions lies on SOI technology and advanced nanoscale devices. The organizing committee invites to actively participate by submitting high quality papers.

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征稿范围

Topics include, but are not limited to

  1. Advanced SOI materials and wafers
  2. New channel materials for CMOS: strained Si, strained SOI, SiGe, GeOI, III-V and high mobility materials on insulator; carbon nanotubes; graphene and other 2D materials
  3. Properties of ultra-thin films and buried oxides, defects, interface quality
  4. Thin gate dielectrics: high-k materials for switches and memory
  5. Nanometer scale devices: technology, characterization techniques and evaluation metrics for high performance, low power, low standby power, high frequency and memory (DRAM, Non-Volatile, SRAM, ReRAM...) applications
  6. Physics mechanisms and innovative SOI-like devices
  7. Alternative transistor architectures including FDSOI, DGSOI, FinFET, MuGFET, vertical MOSFET, Nanowires, FeFET and tunnel FET structures, MEMS/NEMS, Beyond-CMOS nanodevices
  8. New functionalities in silicon-compatible nanostructures and innovative devices representing the More than Moore domain for Sensing, Energy harvesting, RF, High voltage, Imagers, Electronic cooling, etc.
  9. CMOS scaling perspectives; device/circuit level performance evaluation; switches and memory scaling
  10. Three-dimensional integration of devices and circuits, heterogeneous integration
  11. Transport phenomena, compact modeling, device simulation, front- and back-end fabrication process simulation
  12. Advanced test structures and characterization techniques, parameter extraction, reliability and variability issues for new materials and novel devices
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重要日期
  • 会议日期

    01月25日

    2016

    01月27日

    2016

  • 01月27日 2016

    注册截止日期

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Technische Universitat Wien
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