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活动简介

Forum on specification & Design Languages (FDL) is a well established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modelling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Modelling and specification concepts push the development of new design and verification methodologies to ESL (Electronic System Level) thus providing a means for model-driven and automated design of complex electronic systems in a variety of application domains. FDL gives an opportunity to gain up-to-date knowledge in many broad areas of the fast evolving field of system design and verification. Through collaboration with the Accellera Systems Initiative FDL maintains a strong link to many EDA standards like SystemC, OCP and IP-XACT.

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征稿范围

Authors are invited to submit manuscripts on topics including, but not limited to: 
* Formalisms & Languages:
Requirements & Property specification (RSLs, PSLs, SVA, …), Extra-functional specification (timing, power, temperature, aging, …), Multi-domain parallel applications in dynamic real-time environments, Models of computation, Automata (xFSM, …), Networks (Process Networks, Petri Nets, Task Networks), Platform modelling and abstraction, Transaction level modelling, Run-time system and middleware abstraction, Model and component-based design (UML, SysML, MARTE, …), Advanced language extensions for SLDLs (SystemC(-AMS), Modelica, VHDL-AMS, SystemVerilog, Verilog-AMS,…)
* Tools & Techniques:
Formal property checking, Modeling, Simulation & Formal Checking of functional and extra-functional properties, Parallel simulation, Compiler support for multi-core/many-core architectures as well as GPUs and FPGAs, Accelerators in heterogeneous computing platforms, Code analysis and optimization for different metrics, High-level hardware and software synthesis, Testbench automation and Coverage monitoring, Design space exploration and virtual prototyping, Scheduling & real-time analysis
* Design Flows & Methodologies:
Horizontal and vertical virtual integration testing, Requirements engineering and traceability, Mixed critical embedded applications on multi-core multi-CPU SoCs, Power and performance, Safety and security, Heterogeneous (mixed-signal/multiphysical) component integration, Multi-objective optimization, Model-Driven Engineering, Modeling and design of Cyber-Physical Systems (CPS)

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重要日期
  • 会议日期

    09月14日

    2016

    09月16日

    2016

  • 09月16日 2016

    注册截止日期

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