The International Workshop on Logic and Synthesis is the premier forum for research in synthesis, optimization, and verification of integrated circuits and systems. Research on logic synthesis for emerging technologies and for novel computing platforms, such as nanoscale systems and biological systems, is also strongly encouraged. The workshop encourages early dissemination of ideas and results. The workshop accepts complete papers highlighting important new problems in the early stages of development, without providing complete solutions. The emphasis is on novelty and intellectual rigor.
Topics of interest include, but are not limited to: hardware synthesis and optimization; software synthesis; hardware/software co-synthesis; power and timing analysis; testing, validation and verification; synthesis for reconfigurable architectures; hardware compilation for domain-specific languages; design experiences. Submissions on modeling, analysis, and synthesis for emerging technologies and platforms are particularly encouraged.
The workshop format includes paper presentations, posters, invited talks, social lunch and dinner gatherings, and recreational activities. Accepted papers are distributed exclusively to IWLS participants.
07月19日
2021
07月21日
2021
注册截止日期
2024年06月06日 瑞士 Zurich
2024 IEEE/ACM 33rd International Workshop on Logic and Synthesis (IWLS)2018年06月23日 美国
2018 27th International Workshop on Logic and Synthesis2017年06月17日 美国 Austin
2017 26th International Workshop on Logic and Synthesis2016年06月10日 美国 Austin, USA
2016年第25届国际逻辑和合成研讨会2014年05月30日 美国
2014 IEEE国际逻辑与合成研讨会2013年06月07日 美国
2013年计算机逻辑合成国际研讨会
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